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UNISONIC TECHNOLOGIES CO., LTD MJE13003
NPN SILICON POWER TRANSISTORS
DESCRIPTION
These devices are designed for high-voltage, high-speed power switching inductive circuits where fall time is critical. They are particularly suited for 115 and 220V SWITCHMODE .
1
NPN EPITAXIAL SILICON TRANSISTOR
TO-220
FEATURES
* Reverse Biased SOA with Inductive Load @ Tc=100 * Inductive Switching Matrix 0.5 ~ 1.5 Amp, 25 and 100 Typical tc = 290ns @ 1A, 100 . * 700V Blocking Capability
APPLICATIONS
* Switching Regulator's, Inverters * Motor Controls * Solenoid/Relay drivers * Deflection circuits
*Pb-free plating product number: MJE13003L
ORDERING INFORMATION Normal Order Number Lead Free Plating Package
TO-220
MJE13003-x-TA3-F-T MJE13003L-X-TA3-F-T Note: x: Rank, refer to Classification of hFE1.
Pin Assignment 1 2 3 B C E
Packing
Tube
MJE13003L-X-TA3-F-T (1)Packing Type (2)Pin Assignment (3)Package Type (4)Rank (5)Lead Plating (1)T: Tube (2) refer to Pin Assignment (3) TA3: TO-220 (4) x: refer to Classification of hFE1 (5) L: Lead Free Plating, Blank: Pb/Sn
www.unisonic.com.tw Copyright (c) 2005 Unisonic Technologies Co., Ltd
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ABSOLUTE MAXIMUM RATINGS
PARAMETER Collector-Emitter Voltage Collector-Emitter Voltage Emitter Base Voltage
NPN EPITAXIAL SILICON TRANSISTOR
SYMBOL VCEO(SUS) VCEO VEBO IC ICM IB IBM IE IEM
RATINGS UNIT 400 V 700 V 9 V Continuous 1.5 Collector Current A Peak (1) 3 Continuous 0.75 Base Current A Peak (1) 1.5 Continuous 2.25 Emitter Current A Peak (1) 4.5 Total Power Dissipation @ Ta=25 1.4 W PD mW/ Derate above 25 11.2 Total Power Dissipation @ TC=25 40 W PD mW/ Derate above 25 320 Junction Temperature TJ 150 Storage Temperature TSTG -40 ~ +150 Note Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied.
THERMAL DATA
PARAMETER Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Case (1) Pulse Test: Pulse Width=5ms, Duty Cycle 10% SYMBOL R R
JA JC
RATINGS 89 3.12
UNIT /W /W
ELECTRICAL CHARACTERISTICS (TC=25C, unless otherwise specified.)
PARAMETER OFF CHARACTERISTICS (Note) Collector-Emitter Sustaining Voltage Collector Cutoff Current Emitter Cutoff Current SECOND BREAKDOWN Second Breakdown Collector Current with bass forward biased Clamped Inductive SOA with base reverse biased ON CHARACTERISTICS (Note) DC Current Gain SYMBOL TEST CONDITIONS MIN 400 TC=25C TC=100 1 5 1 See Figure 5 See Figure 6 IC=0.5A, VCE=2V IC=1A, VCE=2V IC=0.5A, IB=0.1A IC=1A, IB=0.25A IC=1.5A, IB=0.5A IC=1A, IB=0.25A, TC=100 IC=0.5A, IB=0.1A IC=1A, IB=0.25A IC=1A, IB=0.25A, TC=100 IC=100mA, VCE=10V, f=1MHz VCB=10V, IE=0, f=0.1MHz 8 5 40 25 0.5 1 3 1 1 1.2 1.1 10 21 TYP MAX UNIT V mA mA
VCEO(SUS) IC=10 mA , IB=0 VCEO=Rated Value, ICEO VBE(OFF)=1.5 V IEBO VEB=9 V, IC=0 Is/b RBSOA hFE1 hFE2 VCE(SAT)
Collector-Emitter Saturation Voltage
V
Base-Emitter Saturation Voltage DYNAMIC CHARACTERISTICS Current-Gain-Bandwidth Product Output Capacitance SWITCHING CHARACTERISTICS Resistive Load (Table 1) Delay Time Rise Time Storage Time Fall Time www.unisonic.com.tw
VBE(SAT)
V
fT Cob
4
MHz pF
tD tR tS tFALL
VCC=125V, IC=1A, IB1=IB2=0.2A, tP=25 s, Duty Cycle 1%
0.05 0.5 2 0.4
0.1 1 4 0.7
s s s s 2 of 7
UNISONIC TECHNOLOGIES CO., LTD
QW-R203-017,F
MJE13003
ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER Inductive Load, Clamped (Table 1) Storage Time Crossover Time Fall Time SYMBOL tSV tC tFALL
NPN EPITAXIAL SILICON TRANSISTOR
TEST CONDITIONS MIN TYP 1.7 0.29 0.15 MAX 4 0.75 UNIT s s s
IC=1A, Vclamp=300V, IB1=0.2A, VBE(OFF)=5Vdc, TC=100
Note: Pulse Test : PW=300 s, Duty Cycle 2%
CLASSIFICATION OF hFE1
RANK RANGE A 8 ~ 16 B 15 ~ 21 C 20 ~ 26 D 25 ~ 31 E 30 ~ 36 F 35 ~ 40
Table 1.Test Conditions for Dynamic Performance Reverse Bias Safe Operating Area and Inductive Switching
+5V 1N4933 0.001 F 33 1N4933 1k 68 2N2222 1k +5V 1k 2N2905 47 1/2W MJE200 100 -VBE(OFF) RB IB T.U.T. Ic 5.1k 51 Vclamp *SELECTED FOR1kV VCE 1N4933 270 0.02 F NOTE PW and Vcc Adjusted for Desired Ic RB Adjusted for Desired IB1 33 MJE210 L MR826* Vcc
Resistive Switching
Test Circuits
5V Pw DUTY CYCLE 10% tR, tF 10ns
+125V Rc TUT RB D1 -4.0V SCOPE
Circuit Values
Coil Data : VCC=20V Ferroxcube core #6656 Vclamp=300V Full Bobbin ( ~ 200 Turns) #20
GAP for 30 mH/2 A Lcoil=50mH
VCC=125V RC=125 D1=1N5820 or Equiv. RC=47
Output Waveforms Test Waveforms
Ic Ic(pk) t
t1 tf
tf CLAMPED t1 Adjusted to Obtain Ic t1 VCE or Vclamp TIME t2 t t2 Lcoil(Icpk) Vcc Lcoil(Icpk) Vclamp Test Equipment Scope-Tektronics 475 or Equivalent
+10.3 V
25 S
0 -8.5V tr, tf<10ns Duty Cycly=1.0% RB and Rc adjusted for desired IB and Ic
VCE
Figure 1. Inductive Switching Measurements ICPK 90% Vclamp IC tsv tRV tc VCE IB 90% IB1 10% Vclamp 10% Icpk 2% Ic Vclamp 90% Ic tFI tTI
Table 2. Typical Inductive Switching Performance Ic AMP 0.5 Tc tsv s 1.3 1.6 1.5 1.7 1.8 3 tRV s 0.23 0.26 0.10 0.13 0.07 0.08 tFI s 0.30 0.30 0.14 0.26 0.10 0.22 tTI s 0.35 0.40 0.05 0.06 0.05 0.08 tc s 0.30 0.36 0.16 0.29 0.16 0.28
25 100 25 100 25 100
1
1.5
Time
NOTE: All Data Recorded in the Inductive Switching Circuit in Table 1
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SWITCHING TIMES NOTE
NPN EPITAXIAL SILICON TRANSISTOR
In resistive switching circuits, rise, fall, and storage times have been defined and apply to both current and voltage waveforms since they are in phase. However, for inductive loads, which are common to SWITCHMODE power supplies and hammer drivers, current and voltage waveforms are not in phase. Therefore, separate measurements must be made on each waveform to determine the total switching time. For this reason, the following new terms have been defined. tSV = Voltage Storage Time, 90% IB1 to 10% Vclamp tRV = Voltage Rise Time, 10 ~ 90% Vclamp tFI= Current Fall Time, 90 ~ 10% IC tTI = Current Tail, 10 ~ 2% IC tC = Crossover Time, 10% Vclamp to 10% IC An enlarged portion of the inductive switching waveforms is shown in Figure 7 to aid in the visual identity of these Terms. For the designer, there is minimal switching loss during storage time and the predominant switching power losses occur during the crossover interval and can be obtained using the standard equation from AN-222: PSWT = 1/2 VCCIC(tC)f In general, tRV + tFI tC. However, at lower test currents this relationship may not be valid.
As is common with most switching transistors, resistive switching is specified at 25 and has become a benchmark for designers. However, for designers of high frequency converter circuits, the user oriented specifications which make this a "SWITCHMODE" transistor are the inductive switching speeds (tC and tSV) which are guaranteed at 100 .
RESISTIVE SWITCHING PERFORMANCE
Figure 2. Turn-On Time
2 10 7 1 0.7 0.5
Figure 3. Turn-Off Time ts Vcc=125V Ic/IB=5 TJ=25
tR
Vcc=125V Ic/IB=5 TJ=25
Time, t (gs)
5 3 2
Time, t (gs)
0.3 0.2
1 0.7 0.5 0.3 0.2
tD @ VBE(OFF)=5V
0.1 0.07 0.05 0.03 0.02 0.02 0.03 0.05 0.07 0.1 0.2 0.3 0.5 0.7 10 20
tF
0.1 0.02 0.03
0.05 0.07 0.1
0.2
0.3
0.5
0.7
1
2
Collector Current, IC (A) Figure 4. Thermal Response
1 0.7
Collector Current, IC (A)
D=0.5 0.2 0.1
0.05 0.02
Effective Transient Thermal Resistance, R(t) (Normalized)
0.5 0.3 0.2
0.1 0.07 0.05 0.03 0.02
0.01 Single Pulse
0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 2
Z JC(t)=r(t) R JC R JC=3.12 /W Max D Curves Apply for Power Pulse Train Shown Read Time at t1 TJ(pk)-TC=P(pk) P JC(t)
P (PK)
t1 t2 Duty Cycle, D=t1/t2
0.01 0.01
3
5
10
20
50
100
200
500
1000
Time or Pulse Width, t (ms)
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SAFE OPERATING AREA INFORMATION
FORWARD BIAS
NPN EPITAXIAL SILICON TRANSISTOR
There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC-VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 5 is based on TC = 25 ; TJ(pk) is variable depending on power level. Second breakdown pulse limits are valid for duty cycles to 10% but must be derated when TC 25 . Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the voltages shown on Figure 5 may be found at any case temperature by using the appropriate curve on Figure 7. TJ(pk) may be calculated from the data in Figure 4. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. REVERSE BIAS For inductive loads, high voltage and high current must be sustained simultaneously during turn-off, in most cases, with the base to emitter junction reverse biased. Under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. This can be accomplished by several means such as active clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias Safe Operating Area and represents the voltage-current conditions during reverse biased turn-off. This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. Figure 6 gives PBSOA characteristics. The Safe Operating Area of figures 5 and 6 are specified ratings (for these devices under the test conditions shown.)
Figure 5. Active Region Safe Operating Area
10 5 2 1 0.5 Tc=25 0.2 0.1 0.05 0.02 0.01 5 10 20 50 100 200 300 500 0 0 100 200 300 400 500 600 700 800 dc
5.0 ms 10 ms
Figure 6. Reverse Bias Safe Operating Area
1.6
Collector Current, IC (A)
Collector Current, IC (A)
100
s
1.2
VBE(OFF)=9V
0.8
1.0 ms
TJ 100 IB1=1A
Thermal Limit(Single Pule) Bonding Wire Limit Second Breakdown Limit Curves Apply Below Rated
0.4 5V 3V 1.5V
VCEO
Collector-Emitter Voltage, VCE (V)
Collector-Emitter Clamp Voltage,VCE (V)
Figure 7. Forward Bias Power Derating
1 Second Breakdown Derating 0.8
Power Derating Factor
0.6 Thermal Derating 0.4
0.2
0 20 40 60 80 100 120 140 160
Case Temperature, TC (
)
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DC Current Gain
80 60
NPN EPITAXIAL SILICON TRANSISTOR
TYPICAL PERFORMANCE CHARACTERISTICS
Collector Saturation Region
2
Collector-Emitter Voltage, VCE(V)
TJ=150
TJ=25
1.6
DC Current Gain, hFE
40 30 20
25
1.2
Ic=0.1A 0.3A 0.5A
1A
1.5A
-55
1 0 8 6
0.8
VCE=2V - - - - - -VCE=5V
0.02 0.03 0.05 0.07 0.1 0.2 0.3 0.5 0.7 1 2
0.4
4
0 0.002
0.005 0.01
0.02
0.05
0.1
0.2
0.5
1
2
Collector Current,IC (A)
Base Current, IB (A)
Base-Emitter Voltage
1.4 0.35
Collector-Emitter Saturation Region
1.2
VBE(SAT) @ IC/IB=3 - - - - - -VBE(ON) @ VCE=2V
0.3
Voltage, V(V)
0.25 1
Ic/IB=3 TJ=-55 25
TJ=-55 25
Voltage, V(V)
0.2
0.8
0.15
25
0.6
0.1
150
150
0.05
0.4 0.02 0.03 0.05 0.07 0.1 0.2 0.3 0.5 0.7 1 2
0 0.02 0.03
0.05 0.07 0.1
0.2
0.3
0.5 0.7
1
2
Collector Current,IC (A)
Collector Current, IC (A)
4
Collector cut-off Region
500
Capacitance
300
10
A)
VCE=250V
3
TJ=25 Cib
Collector Current, IC (
TJ=150
2
Capacitance, C (pF)
10
200
10
125 100
100 70 50 30 20
1
10
0
75 50 25
10 10 FORWARD 0 +0.2 +0.4 +0.6 7 5 0.1 0.2 0.5 1 2 5 10 20 50 100 200 500 1000
Cob
-1
REVERSE -0.2
10 -0.4
Base-Emitter Voltage, VBE (V)
Reverse Voltage, VR (V)
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NPN EPITAXIAL SILICON TRANSISTOR
UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.
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